This invention relates to a drive circuit for a flat display apparatus and a flat display apparatus which can be applied to a display apparatus which is configured using, for example, organic EL (Electro Luminescence) devices.
Conventionally, a liquid crystal display apparatus which is one of a flat display apparatus, is configured such that the gamma characteristic is changed over by the setting of a reference voltage to be used for a digital to analog conversion process as disclosed, for example, in Japanese Patent Laid-Open No. Hei 10-333648 (hereinafter referred to as Patent Document 1).
A typical liquid crystal display apparatus is shown in FIG. 16. Referring to FIG. 16, the liquid crystal display apparatus 1 shown includes a display section 2 in which pixels (P) 3R, 3G, 3B, each formed from a liquid crystal cell, a switching element for the liquid crystal cell and a holding capacitor are arranged in a matrix. In the liquid crystal display apparatus 1, each of the pixels 3R, 3G, 3B is connected to a horizontal drive circuit 4 and a vertical drive circuit 5 through a signal line (column line) SIG and a gate line (row line) G, respectively. The vertical drive circuit 5 successively selects the pixels 3R, 3G, 3B while the horizontal drive circuit 4 sets the gradations of the pixels 3R, 3G, 3B using driving signals therefrom thereby to display a desired image. Further, the pixels 3R, 3G, 3B having color filters of red, green and blue provided therefor are arranged successively and cyclically so that a color image can be displayed.
To this end, in the liquid crystal display apparatus 1, image data DR, DG, DB of red, green and blue to be used for display are inputted simultaneously and parallelly from an apparatus body 6 to a controller 7, and the gate lines G of the display section 2 are driven by the vertical drive circuit 5 with timing signals synchronized with the image data DR, DG, DB. Further, the image data DR, DG, DB are time division multiplexed to produce a single series of image data D1 so as to correspond to driving of the signal lines SIG by the horizontal drive circuit 4, and the signal lines SIG are driven by the horizontal drive circuit 4 with the thus produced image data D1.
FIG. 17 is a block diagram showing a detailed configuration of the horizontal drive circuit 4 and the controller 7 together with an associated element. Referring to FIG. 17, the controller 7 successively stores and outputs image data DR, DG, DB outputted from the apparatus body 6 into and from a memory 10 under the control of a memory control circuit 9 to time division multiplex and output the image data DR, DG, DB in a single system such that image data of the same color may successively appear in a unit of a line in a unit of a horizontal scanning period so as to correspond to driving of the signal lines SIG by the horizontal drive circuit 4. More particularly, the horizontal drive circuit 4 successively drives the red pixels 3R, the green pixels 3G and the blue pixels 3B in a unit of a line, and consequently, the controller 7 outputs the image data D1 such that the red image data DR, the green image data DG and the blue image data DB are repeated successively and cyclically in a unit of a line as seen from FIG. 18B.
The controller 7 produces various timing signals synchronized with the image data D1 by means of a timing generator (TG) 11 and outputs the timing signals to the horizontal drive circuit 4 and the vertical drive circuit 5. It is to be noted that the timing signals include a clock CK (FIG. 18A) for the image data D1, a start pulse ST (FIG. 18C) and a strobe pulse (FIG. 18D) indicative of timings of a start and an end of the image data DR, DG, DB of the different colors of the image data D1.
The controller 7 produces original reference voltages VRT, VB to VG, VRB, which are used as references for production of reference voltages to be used for a digital analog conversion process, by means of an original reference signal production circuit 12 and outputs them to the horizontal drive circuit 4.
The horizontal drive circuit 4 inputs image data D1 outputted from the controller 7 to a shift register 13 so that the image data D1 are successively distributed and outputted to systems of signal lines of the display section 2. The reference voltage production circuit 14 produces and outputs reference voltages V1 to V64, which correspond to different gradations of the image data D1, from the original reference voltages VRT, VB to VG, VRB inputted thereto from the controller 7.
Digital to analog conversion circuits (D/A) 15A to 15N perform a digital to analog conversion process for output data of the shift register 13 and output drive signals which are time division multiplexed drive signals of three adjacent ones of the signal lines SIG. The digital to analog conversion circuits 15A to 15N selectively output the reference voltages V1 to V64 produced by a reference voltage production circuit 14 in response to output data of the shift register 13 to perform a digital to analog conversion process of the image data outputted from the shift register 13.
Amplification circuits 16A to 16N amplify and output the output signals of the digital to analog conversion circuits 15A to 15N to the display section 2, respectively. In the display section 2, the output signals of the amplification circuits 16A to 16N are successively and cyclically outputted to the signal lines SIG for the pixels 3R, 3G, 3B of red, green and blue by means of selectors 17A to 17N, respectively.
In this manner, the reference voltages V1 to V64 produced from the original reference voltages VRT, VB to VG, VRB are selectively used to produce drive signals for the signal lines SIG. FIG. 19 shows in block diagram a configuration of the original reference signal production circuit 12 used to produce the original reference voltages VRT, VB to VG, VRB and the reference voltage production circuit 14 used to produce the reference voltages V1 to V64.
Referring to FIG. 19, the original reference signal production circuit 12 shown includes a voltage dividing circuit 21 formed from a predetermined number of resisters connected in series. The voltage dividing circuit 21 divides a reference voltage production voltage VCOM to produce the original reference voltages VRT, VB to VG, VRB. Consequently, the original reference signal production circuit 12 produces the original reference voltages VRT, VB to VG, VRB by resistor voltage division and outputs them through amplification circuits 24A to 27H. It is to be noted that the original reference signal production circuit 12 is configured such that the voltage to be applied to the voltage dividing circuit 21 is changed over by a selection circuit 22 and an inversion amplification circuit 23 so as to cope with line inversion or frame inversion. FIG. 18F illustrates the potential of a signal line SIG where line inversion is involved.
Meanwhile, the reference voltage production circuit 14 includes a resistor series circuit 26 formed from voltage dividing circuits R1 to R7 connected in series. Each of the voltage dividing circuits R1 to R7 includes a predetermined number of resistors having an equal resistance value and connected in series. The original reference voltages VRT, VB to VG, VRB are inputted through amplification circuits 27A to 27H to one end of the resistor series circuit 26, nodes of the voltage dividing circuits R1 to R7 which form the resistor series circuit 26 and the other end of the resistor series circuit 26, respectively. Consequently, the reference voltage production circuit 14 divides potential differences by the original reference voltages VRT, VB to VG, VRB produced by the original reference signal production circuit 12 further by means of the voltage dividing circuits R1 to R7 to produce the reference voltages V1 to V64 within the range of the original reference voltages VRT and VRB.
Since the reference voltages V1 to V64 are produced from the original reference voltages VRT, VB to VG, VRB in this manner, the numbers of resistors which form the voltage dividing circuits R1 to R7 of the reference voltage production circuit 14 are individually set, to predetermined numbers, and the original reference voltages VRT, VB to VG, VRB are divided so that a plurality of reference voltages V1 to V64 corresponding to gradations of the image data D1 can be outputted.
In the original reference signal production circuit 12, the values of the resistors which form the voltage dividing circuit 21 are set so that an image may be displayed with a desired gamma characteristic by means of the reference voltages V1 to V64 corresponding to the gradations of the image data D1 in this manner. Consequently, as seen from a curve L1 in FIG. 20 where the voltage VCOM is set to 5 V, a desired gamma characteristic can be assured by polygonal line approximation depending upon the setting of the original reference voltages VRT, VB to VG, VRB. Further, in the original reference signal production circuit 12, the original reference voltages VRT, VB to VG, VRB to be outputted from the voltage dividing circuit 21 can be changed over by a change of the wiring line pattern. Thus, as seen from a curve L2 shown for contrast with the characteristic indicated by the curve L1 in FIG. 20, for example, while the original reference voltages VRT and VRB which are potentials at the opposite ends are fixed, the remaining original reference voltages VB to VG can be varied within a range indicated by arrow marks to vary the gamma characteristic variously.
In the liquid crystal display apparatus 1 wherein the gamma characteristic can be changed over by the setting of the original reference signal production circuit 12 which produces the original reference voltages VRT, VB to VG, VRB in this manner, while the controller 7 including the original reference signal production circuit 12 is formed from a control IC, the horizontal drive circuit 4 is formed from a driver IC. Consequently, according to the liquid crystal display apparatus 1, products of different gamma characteristics can be produced by replacing only the control IC, and consequently, upon modification to the gamma characteristic, the period of time required for the modification can be reduced.
Incidentally, a display apparatus of the type described sometimes displays a plurality of different display objects at a time as in a case wherein, for example, as shown in FIG. 21, a natural picture G derived from a result of image pickup and menus M1 to M3 derived from operation and so forth are displayed at a time. As regards the natural picture G from among such display objects as described above, if the variation of the luminance level is set to a comparatively great amount on the black level side with respect to the variation of image data D1 as indicated by a curve L1 in FIG. 22, then a three-dimensional feeling can be assured at a portion at which the luminance level is low. Consequently, dark hair or the like can be displayed with a feeling of high quality and with a high degree of picture quality. However, as regards the menus M1 to M3, if the variation of the luminance level is set to a comparatively great amount on the black level side with respect to the variation of image data in this manner, then the menus M1 to M3 are displayed but in a dull image and in poor visibility. Therefore, it is demanded for the menus M1 to M3 to be displayed with a linear characteristic that the variation of the luminance level is substantially fixed with respect to the variation of the image data D1 as seen from a curve L2 in FIG. 22.
Consequently, where a plurality of different display objects are displayed at a time in this manner, it is necessary to change over the gamma characteristic set with the reference voltages V1 to V64 described hereinabove. Actually, however, where the conventional configuration of the original reference voltage production circuit 12 and the reference voltage production circuit 14 is employed, it is impossible to change over the gamma characteristic depending upon the display object in this manner. Consequently, the conventional display apparatus has a problem that, where a plurality of different display objects is displayed at a time, the display objects cannot be displayed individually with appropriate gamma characteristics.
Incidentally, one of possible solutions to the problem just described relies upon a process of image data. However, this solution has a problem that the process of image data is complicated and cumbersome.